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 FUJITSU SEMICONDUCTOR DATA SHEET
DS04-27710-2E
ASSP For Power Supply Applications (Secondary battery)
DC/DC Converter IC for Charging Li-ion Battery
MB3888
s DESCRIPTION
The MB3888 is a DC/DC converter IC suitable for down-conversion, using pulse-width (PWM) charging and enabling output voltage to be set to any desired level from one cell to four cells. The MB3888 provides a broad power supply voltage range and low standby current as well as high efficiency, making it ideal for use as a built-in charging device in products such as notebook PC. This product is covered by US Patent Number 6,147,477.
s FEATURES
* * * * * Output voltage setting using external resistor : 1 cell to 4 cells High efficiency : 96% (VIN = 19 V, Vo = 16.8 V) Wide range of operating supply voltages : 8 V to 25 V Output voltage setting accuracy : 5 V 0.74% (Ta = -10 C to 85 C) Charging current accuracy : 5%
(Continued)
s PACKAGE
20-pin plastic SSOP
(FPT-20P-M03)
MB3888
(Continued) * Built-in frequency setting capacitor enables frequency setting using external resistor only * Oscillation frequency range : 100 kHz to 500 kHz * Built-in current detection amplifier with wide in-phase input voltage range : 0 V to VCC * In standby mode, leave output voltage setting resistor open to prevent inefficient current loss * Built-in standby current function : 0 A (standard) * Built-in soft-start function independent of loads * Built-in totem-pole output stage supporting P-channel MOS FETs devices
2
MB3888
s PIN ASSIGNMENT
(TOP VIEW)
GND : 1 RT : 2 CTL : 3 VREF : 4 DTC : 5 FB2 : 6 -INE2 : 7 +INE2 : 8 OUTD : 9 -INC : 10
20 : CS 19 : VCC (O) 18 : OUT 17 : VH 16 : VCC 15 : FB1 14 : -INE1 13 : +INE1 12 : OUTC 11 : +INC
(FPT-20P-M03)
3
MB3888
s PIN DESCRIPTION
Pin No. 1 2 Symbol GND RT I/O I O I O I I O I I O I I O O O Ground terminal. Triangular-wave oscillation frequency setting resistor connection terminal. Power supply control terminal. Setting the CTL terminal at "L" level places the IC in the standby mode. Reference voltage output terminal. PWM comparator block (PWM) input terminal. Compares the lowest voltage among terminals FB1, FB2, and DTC, with triangular wave and controls output. Error amplifier (Error Amp2) output terminal. Error amplifier (Error Amp2) inverted input terminal. Error amplifier (Error Amp2) non-inverted input terminal. With IC in standby mode, this terminal is set to "Hi-Z" to prevent loss of current through output voltage setting resistance. Set CTL terminal to "H" level and OUTD terminal to "L" level. Current detection amplifier (Current Amp) input terminal. Current detection amplifier (Current Amp) input terminal. Current detection amplifier (Current Amp) output terminal. Error amplifier (Error Amp1) non-inverted input terminal. Error amplifier (Error Amp1) inverted input terminal. Error amplifier (Error Amp1) output terminal. Power supply terminal for reference power supply and control circuit. Power supply terminal for FET drive circuit (VH = VCC - 6 V) . External FET gate drive terminal. Output circuit power supply terminal. Soft-start capacitor connection terminal. Descriptions
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
CTL VREF DTC FB2 -INE2 +INE2 OUTD -INC +INC OUTC +INE1 -INE1 FB1 VCC VH OUT VCC (O) CS
4
MB3888
s BLOCK DIAGRAM
Current Amp +INC 11 -INC 10 OUTC 12 Error Amp1 VREF -INE1 14 +INE1 13 - + + PWM Comp. + + + - FB1 15 Error Amp2 VREF -INE2 7 +INE2 8 - + + UVLO VCC UVLO FB2 6 DTC 5 OUTD 9 VREF UVLO VH VCC - 6 V OUT Drive 19 VCC (O) + - x20
18 OUT
17 VH
Bias Voltage
-2.5 V VREF 10 A CS 20 45 pF SOFT 2 RT 4 VREF 1 GND OSC bias REF 5V CTL -1.5 V
16 VCC
3
CTL
5
MB3888
s ABSOLUTE MAXIMUM RAGINGS
Parameter Power supply voltage Output current Peak output current Power dissipation Storage temperature Symbol VCC IOUT IOUT PD TSTG Conditions VCC, VCC (O) terminal Duty 5 % (t = 1 / fOSC x Duty) Ta +25 C Rating Min -55 Max 28 60 700 540* +125 Unit V mA mA mW C
* : The package is mounted on the dual-sided epoxy board (10 cm x 10 cm) . WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
6
MB3888
s RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage Reference voltage output current VH terminal output current Input voltage OUTD terminal output voltage OUTD terminal output current CTL terminal input voltage Output current Peak output current Oscillation frequency Timing resistor Soft-start capacitor VH terminal capacitor Reference voltage output capacitor Operating ambient temperature Symbol VCC IREF IVH VINE VINC VDTC VOUTD IOUTD VCTL IOUT IOUT fOSC RT CS CVH CREF Ta Conditions VCC, VCC (O) terminal -INE and +INE terminal -INC and +INC terminal DTC terminal Duty 5 % (t = 1 / fosc x Duty) Rating Min 8 -1 0 0 0 0 0 0 0 -45 -600 100 27 -30 Typ 290 43 0.022 0.1 0.1 +25 Max 25 0 30 VCC - 1.8 VCC VCC - 0.9 17 2 25 +45 +600 500 130 1.0 1.0 1.0 +85 Unit V mA mA V V V V mA V mA mA kHz k F F F C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
7
MB3888
s ELECTRICAL CHARACTERISTICS
(Ta = +25 C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA) Parameter Output voltage Input stability Load stability Short-circuit output current Threshold voltage Hysteresis width Threshold voltage Hysteresis width 3. Soft-start block [SOFT] 4. Triangular waveform oscillator block [OSC] Symbol VREF Line Load Ios VTLH VTHL VH VTLH VTHL VH Pin No. 4 4 4 4 16 16 16 4 4 4 Conditions Ta = +25 C Ta = -10 C to +85 C VCC = 8 V to 25 V VREF = 0 mA to -1 mA VREF = 1 V VCC = VCC (O) , VCC = VCC = VCC (O) , VCC = VCC = VCC (O) VREF = VREF = Rating Min 4.975 4.963 -50 6.2 5.2 2.6 2.4 -14 Typ 5.000 5.000 3 1 -25 6.4 5.4 1.0* 2.8 2.6 0.2* -10 Max 5.025 5.037 10 10 -12 6.6 5.6 3.0 2.8 -6 Unit V V mV mV mA V V V V V V A
1. Reference voltage block [REF]
2. Under voltage lockout protection circuit block [UVLO]
Charge current
ICS
20
Oscillation frequency Frequency temperature stability
fOSC
18
RT = 43 k
260
290
320
kHz
f/fdt
18
Ta = -30 C to +85 C
1*
%
* : Standard design value.
(Continued)
8
MB3888
(Ta = +25 C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA) Parameter Input offset voltage Input bias current Voltage gain Frequency bandwidth 5-1. Error amplifier block Output voltage [Error Amp1, Error Amp2] Output source current Output sink current OUTD terminal output leak current OUTD terminal output ON resistor Input offset current Symbol VIO IB AV BW VFBH VFBL Pin No. Conditions Rating Min -100 4.7 150 -3 -180 -195 1.9 0.34 1.8 0.2 0 19 Typ 1 -30 100* 2* 4.9 20 -2 300 0 35 20 0.1 -120 -130 2.0 0.40 2.0 0.4 20 Max 5 200 -1 1 50 +3 30 0.2 2.1 0.46 2.2 0.6 VCC 21 Unit mV nA dB MHz V mV mA A A mV A A A A V V V V V V/V
7, 8, FB1 = FB2 = 2 V 13, 14 7, 8, 13, 14 6, 15 DC 6, 15 AV = 0 dB 6, 15 6, 15
ISOURCE 6, 15 FB1 = FB2 = 2 V ISINK ILEAK RON VIO I+INCH I-INCH 6, 15 FB1 = FB2 = 2 V 9 9 10, 11 11 10 11 10 12 12 12 12 10, 11 12 OUTD = 17 V OUTD = 1 mA +INC = -INC = 3 V to VCC +INC = 3 V to VCC, Vin = -100 mV +INC = 3 V to VCC, Vin = -100 mV +INC = 0 V, Vin = -100 mV +INC = 0 V, Vin = -100 mV +INC = 3 V to VCC, Vin = -100 mV +INC = 3 V to VCC, Vin = -20 mV +INC = 0 V to 3 V, Vin = -100 mV +INC = 0 V to 3 V, Vin = -20 mV +INC = 3 V to VCC, Vin = -100 mV
Input current I+INCL 6. Current detection amplifier block [Current Amp] Current detection voltage I-INCL VOUTC1 VOUTC2 VOUTC3 VOUTC4 In-phase input voltage range Voltage gain * : Standard design value. VCM AV
(Continued)
9
MB3888
(Continued)
Symbol BW VOUTCH Output voltage VOUTCL Output source current Output sink current 7. PWM comparator block [PWM Comp.] ISOURCE ISINK VTL Threshold voltage VTH Input bias current Output source current Output sink current 8. Output block [OUT] Output ON resistor Rise time Fall time CTL input voltage Input current IDTC ISOURCE ISINK ROH ROL tr1 tf1 VON VOFF ICTLH ICTLL Pin No. 12 12 12 12 12 (Ta = +25 C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA) Parameter Frequency bandwidth 6. Current detection amplifier block [Current Amp] Conditions AV = 0 dB OUTC = 2 V OUTC = 2 V Rating Min 4.7 150 1.4 -2.0 2 0 VCC - 6.5 Typ 2* 4.9 20 -2 300 1.5 2.5 -0.6 -400* 400* 6.5 5.0 50* 50* 100 0 VCC - 6.0 Max 200 -1 2.6 9.8 7.5 25 0.8 150 1 VCC - 5.5 Unit MHz V mV mA A V V A mA mA ns ns V V A A V
5, 6, Duty cycle = 0 % 15 5, 6, Duty cycle = 100 % 15 5 18 18 18 18 18 18 3 3 3 3 DTC = 0.4 V OUT = 13 V, Duty 5 % (t = 1 / fOSC x Duty) OUT = 19 V, Duty 5 % (t = 1 / fOSC x Duty) OUT = -45 mA OUT = 45 mA OUT = 3300 pF (equivalent to Si4435 x 1) OUT = 3300 pF (equivalent to Si4435 x 1) IC Active mode IC Standby mode CTL = 5 V CTL = 0 V VCC = VCC (O) = 8 V to 25 V, VH = 0 to 30 mA VCC = VCC (O) , CTL = 0 V VCC = VCC (O) , CTL = 5 V
9. Control block [CTL] 10. Bias voltage block [VH] 11. General
Output voltage
VH
17
Standby current Power supply current
ICCS ICC
16 16
0 4
10 6
A mA
* : Standard design value
10
MB3888
s TYPICAL CHARACTERISTICS
Power supply current vs. Power supply voltage Power supply current ICC (mA)
10 8 6 4 2 0 0 5 10 15 20 25
Reference voltage vs. Power supply voltage
6
Reference voltage VREF (V)
Ta = +25 C CTL = 5 V
5 4 3 2 1 0 0 5 10 15 20 25 Ta = +25 C CTL = 5 V VREF = 0 mA
Power supply voltage VCC (V) Reference voltage vs. Load current
6 Ta = +25 C VCC = 19 V CTL = 5 V
Power supply voltage VCC (V) Reference voltage vs. Ambient temperature
5.05 5.04 5.03 5.02 5.01 5.00 4.99 4.98 4.97 4.96 4.95 -40 -20 0 20 40 60 80 100 VCC = 19 V CTL = 5 V VREF = 0 mA
Reference voltage VREF (V)
5 4 3 2 1 0 0 5 10 15 20
25
30
Reference voltage VREF (V)
Load current IREF (mA) CTL terminal current, reference voltage vs. CTL terminal voltage CTL terminal current ICTL (A)
1000 900 800 700 600 500 400 300 200 100 0 0 5 10 15 20 VREF ICTL
Ambient temperature Ta ( C)
8 7 6 5 4 3 2 1 0 25
CTL terminal voltage VCTL (V)
Reference voltage VREF (V)
Ta = +25 C VCC = 19 V
10 9
(Continued)
11
MB3888
Triangular wave oscillation frequency fOSC (Hz)
Triangular wave oscillation frequency vs. Timing resistor
1M
Triangular wave oscillation frequency vs. Power supply voltage Triangular wave oscillation frequency fOSC (kHz)
320 315 310 305 300 295 290 285 280 275 270 265 260 0 5 10 15 20 Ta = +25 C CTL = 5 V RT = 43 k
Ta = +25 C VCC = 19 V CTL = 5 V
100 k
10 k 10 100 1000
25
30
Timing resistor RT (k) Triangular wave oscillation frequency vs. Ambient temperature
320 315 310 305 300 295 290 285 280 275 270 265 260 -40 VCC = 19 V CTL = 5 V RT = 43 k
Power supply voltage VCC (V)
Triangular wave oscillation frequency fOSC (kHz)
-20
0
20
40
60
80
100
Ambient temperature Ta ( C)
(Continued)
12
MB3888
(Continued)
Error amplifier gain and phase vs. Frequency
40 Ta = +25 C AV VCC = 19 V 180 10 k 10 k 4.2 V 240 k (7) 14 2.4 k 20 13 (8) 10 k 2.5 V -40 1k 10 k 100 k 1M -180 10 M - + +
Phase (deg)
Gain AV (dB)
20
90
1 F IN
+
0
0
15 (6) Error Amp1 (Error Amp2)
OUT
-20
-90
10 k
Frequency f (Hz) Current detection amplifier and phase vs. Frequency
40 AV Ta = +25 C 180 VCC = 19 V 11 + 12 10 k 10 16.8 V -40 1k 10 k 100 k 1M -180 10 M - Current Amp OUT
Phase (deg)
Gain AV (dB)
20 0
90
10 k 1 F
+
0
IN
-20
-90
Frequency f (Hz) Power dissipation vs. Ambient temperature Power dissipation PD (mW)
600 540 500 400 300 200 100 0 -40
-20
0
20
40
60
80
100
Ambient temperature Ta ( C) 13
MB3888
s FUNCTIONAL DESCRIPTION
1. DC/DC Converter Unit
(1) Reference voltage block (REF) The reference voltage generator uses the voltage supplied from the VCC terminal (pin 16) to generate a temperature-compensated, stable voltage (5.0 V Typ) used as the reference supply voltage for the IC's internal circuitry. This terminal can also be used to obtain a load current to a maximum of 1 mA from the reference voltage VREF terminal (pin 4) . (2) Triangular wave oscillator block (OSC) The triangular wave oscillator builds the capacitor for frequency setting into, and generates the triangular wave oscillation waveform by connecting the frequency setting resistor with the RT terminal (pin 2) . The triangular wave is input to the PWM comparator on the IC. (3) Error amplifier block (Error Amp1) This amplifier detects the output signal from the current detection amplifier (Current amp1) , compares this to the +INE1 terminal (pin 13) , and outputs a PWM control signal to be used in controlling the charging current. In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the FB1 terminal (pin 15) and -INE1 terminal (pin 14) , providing stable phase compensation to the system. Connecting a soft-start capacitor to the CS terminal (pin 20) prevents rush currents when the IC is turned on. Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output load. (4) Error amplifier block (Error Amp2) This amplifier (Error Amp2) detects the output voltage from the DC/DC converter and outputs the PWM control signal. External output voltage setting resistors can be connected to the error amplifier inverse input terminal to set the desired level of output voltage from 1 cell to 4 cells. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB2 terminal (pin 6) to the -INE2 terminal (pin 7) of the error amplifier, enabling stable phase compensation to the system. Connecting a soft-start capacitor to the CS terminal (pin 20) prevents rush currents when the IC is turned on. Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output load. (5) Current detector amplifier block (Current Amp) The current detection amplifier (Current Amp) detects a voltage drop which occurs between both ends of the output sense resistor (RS) due to the flow of the charge current, using the +INC terminal (pin 11) and -INC terminal (pin 10) . Then it outputs the signal amplified by 20 times to the error amplifier (Error Amp1) at the next stage. (6) PWM comparator block (PWM Comp.) The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error amplifiers (Error Amp1 and Error Amp2) and DTC terminal (pin 5) depending on their output voltage.
14
MB3888
The PWM comparator circuit compares the triangular wave generated by the triangular wave oscillator to the error amplifier output voltage or DTC terminal voltage, and turns on the external output transistor during the interval in which the triangular wave voltage is lower than the error amplifier output voltage. (7) Output block (OUT) The output circuit uses a totem-pole configuration capable of driving an external P-channel MOS FET. The output "L" level sets the output amplitude to 6 V (Typ) using the voltage generated by the bias voltage block (VH) . This results in increasing conversion efficiency and suppressing the withstand voltage of the connected external transistor in a wide range of input voltages. (8) Control block (CTL) Setting the CTL terminal (pin 3) at "L" level places the IC in the standby mode. (The supply current is 10 A at maximum in the standby mode.) Setting the CTL terminal at "H" level generates an internal reference voltage, placing the system under outputting status. CTL function table CTL L H (9) Bias voltage block (VH) The bias voltage circuit outputs VCC -6 V (Typ) as the minimum potential of the output circuit. In the standby mode, this circuit outputs the potential equal to VCC. Power OFF (Standby) ON (Active) OUTD Hi-Z L
2. Protection Functions
Under voltage lockout protection circuit (UVLO) The transient state or a momentary decrease in supply voltage or internal reference voltage (VREF) , which occurs when the power supply (VCC) is turned on, may cause malfunctions in the control IC, resulting in breakdown or degradation of the system. To prevent such malfunction, the under voltage lockout protection circuit detects a supply voltage or internal reference voltage drop and fixes the OUT terminal (pin 18) to the "H" level. The system restores voltage supply when the supply voltage or internal reference voltage reaches the threshold voltage of the under voltage lockout protection circuit. Protection function (UVLO) operation table When UVLO is operating (VCC or VREF voltage is lower than UVLO threshold voltage) . OUTD OUT CS Hi-Z H L
3. Soft-Start Function
Soft-start block (SOFT) Connecting a capacitor to the CS terminal (pin 20) prevents surge currents when the IC is turned on. Using an error amplifier for soft-start detection makes the soft-start time constant, being independent of the output load of the DC/DC converter. 15
MB3888
s SETTING THE CHARGING VOLTAGE
The charging voltage (DC/DC output voltage) can be set by connecting external voltage setting resistors (R3, R4) to the -INE2 terminal (pin 7) according to the voltage at the +INE2 terminal (pin 8) . Be sure to select a resistor value that allows you to ignore the on resistor (35 , 1 mA) of the internal FET connected to the OUTD terminal (pin 9) .In standby mode, the charging voltage is applied to OUTD termial. Therefore, output voltage must be adjusted so that voltage applied to OUTD terminal is 17 V or less. Battery charging voltage : VO VO (V) = (R3 + R4) / R4 x +INE2 (V)
VO
R3 -INE2 7 R4 9 OUTD
- + +
20 CS +INE2 8
s METHOD OF SETTING THE CHARGING CURRENT
The charge current (output limit current) value can be set with the voltage at the +INE1 terminal (pin 13) . If a current exceeding the set value attempts to flow, the charge voltage drops according to the set current value. Battery charge current setting voltage : +INE1 +INE1 (V) = 20 x I1 (A) x RS ()
s METHOD OF SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by the timing resistor (RT) connected the RT terminal (pin 2) . Triangular wave oscillation frequency : fOSC fOSC (kHz) = 12690 / RT (k) :
16
MB3888
s METHOD OF SETTING THE SOFT-START TIME
(1) Setting constant voltage mode soft-start For preventing rush current upon activation of IC, the IC allows soft-start using the capacitor (CS) connected to the CS terminal (pin 20) . When CTL terminal (pin 3) is placed under "H" level and IC is activated (VCC UVLO threshold voltage) , Q2 is turned off and the external soft-start capacitor (CS) connected to the CS terminal is charged at 10 A. Error Amp output (FB2 terminal (pin 6) ) is determined by comparison between the lower voltage of the two non-inverted input terminals (+INE2 terminal (pin 8) and CS terminal voltage) and inverted input terminal voltage (-INE2 terminal (pin 7) voltage) . Within the soft-start period (CS terminal voltage < +INE2) , FB2 is determined by comparison between -INE2 terminal voltage and CS terminal voltage, and DC/DC converter output voltage goes up proportionately with the increase of CS terminal voltage caused by charging on the soft-start capacitor. Soft-start time is obtained from the following formula : Soft-start time : ts (time to output 100 %) tS (s) = 0.42 x CS (F) , at +INE2 = 4.2 V :
= 4.9 V = 4.2 V (+INE2)
CS terminal voltage Comparison with Error Amp block -INE2 voltage.
=0V
Soft-start time : ts
VREF
10 A
10 A
FB2 6 -INE2 7 CS +INE2 CS 20 8 Q2 4.2 V UVLO - + + Error Amp2
Soft-start circuit
17
MB3888
(2) Setting constant current mode soft-start For preventing rush current upon activation of IC, the IC allows soft-start using the capacitor (CS) connected to the CS terminal (pin 20) . When CTL terminal (pin 3) is placed under "H" level and IC is activated (VCC UVLO threshold voltage) , Q2 is turned off and the external soft-start capacitor (CS) connected to the CS terminal is charged at 10 A. Error Amp output (FB1 terminal (pin 15) ) is determined by comparison between the lower voltage of the two non-inverted input terminals (+INE1 terminal (pin 13) and CS terminal voltage) and inverted input terminal voltage (-INE1 terminal (pin 14) voltage) . Within the soft-start period (CS terminal voltage < +INE1) , FB1 is determined by comparison between -INE1 terminal voltage and CS terminal voltage, and DC/DC converter output voltage goes up proportionately with the increase of CS terminal voltage caused by charging on the soft-start capacitor. Soft-start time is obtained from the following formula : Soft-start time : ts (time to output 100 %) tS (s) = +INE2 / 10 (A) x CS (F) :
= 4.9 V = +INE2
CS terminal voltage Comparison with Error Amp block -INE1 voltage.
=0V
Soft-start time : tS
VREF
10 A
10 A
FB1 15 -INE1 14 CS +INE1 CS 20 13 Q2 UVLO - + + Error Amp1
Soft-start circuit
18
MB3888
s PROCESSING WITHOUT USING OF THE CS TERMINAL
When soft-start function is not used, the CS terminal (pin 20) should be left open.
"Open"
CS 20
When no soft-start time is specified
s PROCESSING WITHOUT USING OF THE DTC TERMINAL
When external duty control is not performed using DTC terminal, make a short circuit between the DTC terminal (pin 5) and VREF terminal (pin 4) with a shortest-possible wire.
4 VREF 5 DTC
When DTC terminal is not used
19
MB3888
s NOTE ON AN EXTERNAL REVERSE-CURRENT PREVENTIVE DIODE
* Insert a reverse-current preventive diode at one of the three locations marked * to prevent reverse current from the battery. * When selecting the reverse current prevention diode, be sure to consider the reverse voltage (VR) and reverse current (IR) of the diode.
19
VCC (O)
VIN
*
11 18 OUT 10
*
I1 RS
BATT
*
VH 17 Battery
20
VIN = 13.6 V to 25 V (at 3 cell) VIN = 17.8 V to 25 V (at 4 cell)
R23 200 k R22 12 k Current Amp + - x20
Q3
+INC
11
SW2
-INC
10
s APPLICATION EXAMPLE
R16 200 k Error Amp1 - + + OUT Drive Q1 L1 22 H D1 C2 100 F
+
R14 1 k VREF VCC (O) 19 OUT 18 C5 0.1 F C11 C12 10 F 10 F
OUTC 12 R8 100 k -INE1 14 IIN PWM Comp. + + + -
R15 120 Q2
R12 30 k
R19 100 k
+INE1
AC Adaptor
13
SW1 Error Amp2 VREF 7 8 UVLO VCC UVLO 6 5 9 VREF UVLO + + - Bias Voltage VH VH 17 VCC - 6 V
R13 20 k
C10 5600 pF R9 10 k
I1 RS 0.033
+
VO
FB1
15
R18 200 k
-INE2
R5 10 k
+INE2
C3 100 F
R6 51 k
Battery Output voltage (Battery voltage) is adjustable.
R17 100 k
C6 1500 pF R3 330 k
R21 1.5 k
FB2
DTC
OUTD -2.5 V VREF 10 A OSC 45 pF SOFT 2 RT RT 43 k C9 0.1 F 4 bias REF -1.5 V
VCC 16 C7 0.1 F CTL CTL 5V 1 VREF GND 3
Note: Set output voltage so that voltage applied to OUTD terminal is 17 V or less.
CS
20
CS 0.022 F
MB3888
21
MB3888
s PARTS LIST
COMPONENT Q1 Q2 D1 L1 C2, C3 CS C5 C6 C7 C9 C10 C11, C12 RS RT R3 R5 R6 R8 R9 R12 R13 R14 R15 R16, R18, R23 R17, R19 R21 R22 ITEM P-ch FET N-ch FET Diode Inductor Electrolytic condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor SPECIFICATION VENDOR PARTS No. Si4435DY 2N7002E RB053L-30 SLF12565T220M3R5 25CV100AX C1608JB1H223K C1608JB1H104K GRM39B152K10 C1608JB1H104K C1608JB1H104K GRM39B562K10 C3225JF1E106Z SRS1R033F RR0816P433D RR0816P334D RR0816P103D RR0816P513D RR0816P104D RR0816P103D RR0816P303D RR0816P203D RR0816P102D RR0816P121D RR0816P204D RR0816P104D RR0816P152D RR0816P123D VDS = -30 V, ID = 8 A (Max) VISHAY SILICONIX VDS = 60 V, ID = 0.115 A (Max) VISHAY SILICONIX VF = 0.42 V (Max) , at IF = 3 A 22 H 100 F 0.022 F 0.1 F 1500 pF 0.1 F 0.1 F 5600 pF 10 F 0.033 43 k 330 k 10 k 51 k 100 k 10 k 30 k 20 k 1 k 120 200 k 100 k 1.5 k 12 k 3.5 A, 31.6 m 25 V (10 %) 50 V 50 V 10 V 50 V 50 V 10 V 25 V 1.0 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % ROHM TDK SANYO TDK TDK MURATA TDK TDK MURATA TDK SEIDEN TECHNO ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm
Note : VISHAY SILICONIX : VISHAY Intertechnology, Inc. ROHM : ROHM CO., LTD. TDK : TDK Corporation SANYO : SANYO Electric Co., Ltd. SEIDEN TECHNO : SEIDEN TECHNO CO., LTD. MURATA : Murata Manufacturing Co., Ltd. ssm : SUSUMU Co., Ltd.
22
MB3888
s REFERENCE DATA
Conversion efficiency vs. Charge current (Constant voltage mode)
100
Conversion efficiency vs. Charge current (Constant current mode)
100
Conversion efficiency (%)
98 96 94 92 90 88 86 84 82
Conversion efficiency (%)
Ta = +25 C VIN = 19 V BATT charge voltage = set at 12.6 V SW1 = SW2 = ON Efficiency (%) = (VBATT x IBATT) / (VIN x IIN) x 100
Ta = +25 C 98 VIN = 19 V 96 BATT charge voltage = set at 12.6 V SW1 = SW2 = ON 94 Efficiency (%) = 92 (VBATT x IBATT) / (VIN x IIN) x 100 90 88 86 84 82 80 0 2 4 6 8 10 12 14 16
80 10 m
100 m
1
10
BATT charge current IBATT (A)
BATT charge voltage VBATT (V)
Conversion efficiency vs. Charge current (Constant voltage mode)
100 100
Conversion efficiency vs. Charge current (Constant current mode) Conversion efficiency (%)
98 96 94 92 90 88 86 84 82 80 0 2 4 6 8 10 Ta = +25 C VIN = 19 V BATT charge voltage = set at 16.8 V SW1 = SW2 = ON Efficiency (%) = (VBATT x IBATT) / (VIN x IIN) x 100 12 14 16 18 20
Conversion efficiency (%)
98 96 94 92 90 88 86 84 82 80 10 m 100 m Ta = +25 C VIN = 19 V BATT charge voltage = set at 16.8 V SW1 = SW2 = ON Efficiency (%) = (VBATT x IBATT) / (VIN x IIN) x 100 1 10
BATT charge current IBATT (A)
BATT charge voltage VBATT (V)
(Continued)
23
MB3888
BATT voltage vs. BATT charge current (set at 12.6 V)
18 16 Ta = +25 C, VIN = 19 V BATT : Electronic load, (Product of KIKUSUI PLZ-150W)
Dead Battery MODE (SW1 = OFF, SW2 = ON) Resume MODE (SW1 = ON, SW2 = OFF) Suspend MODE (SW1 = ON, SW2 = ON)
BATT voltage vs. BATT charge current (set at 16.8 V)
20 18 16 14 12 10 8 6 4 2 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Dead Battery MODE (SW1 = OFF, SW2 = ON) Resume MODE (SW1 = ON, SW2 = OFF) Suspend MODE (SW1 = ON, SW2 = ON)
Ta = +25 C, VIN = 19 V BATT : Electronic load, (Product of KIKUSUI PLZ-150W)
BATT voltage VBATT (V)
14 12 10 8 6 4 2 0 0 0.5 1 1.5
2
2.5
3
3.5
4
4.5
5
BATT charge current IBATT (A)
BATT voltage VBATT (V)
BATT charge current IBATT (A)
(Continued)
24
MB3888
Switching waveform constant voltage mode (set at 12.6 V)
VBATT (mV) Ta = +25 C VIN = 19 V 100 BATT = 1.5 A 0 -100 VD (V) 15 10 5 0 VD
Switching waveform constant current mode (set at 12.6 V, with 10 V)
VBATT (mV) Ta = +25 C VIN = 19 V 100 BATT = 3.0 A 0 -100 VD (V) 15 10 5 0 VD 118 mVp-p VBATT
98 mVp-p VBATT
0
1
2
3
4
5
6
7
8
9
10 (s)
0
1
2
3
4
5
6
7
8
9
10 (s)
Switching waveform constant voltage mode (set at 16.8 V)
VBATT (mV) Ta = +25 C 100 VIN = 19 V BATT = 1.5 A 0 -100 VD (V) 15 10 5 0
Switching waveform constant current mode (set at 16.8 V, with 10 V)
+25 VBATT (mV) Ta = = 19 C VIN V 100 BATT = 3.0 A 0
46 mVp-p
VBATT
94 mVp-p VBATT
VD
-100 VD (V) 15 10 5 0
VD
0
1
2
3
4
5
6
7
8
9
10 (s)
0
1
2
3
4
5
6
7
8
9
10 (s)
(Continued)
25
MB3888
Soft-start operating waveform constant voltage mode (set at 12.6 V)
VBATT (V) 20 10 0 VCS (V) 4 2 0 IIN VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCTL Ta = +25 C VIN = 19 V BATT = 12 ts = 9.6 ms VBATT
Discharge operating waveform constant voltage mode (set at 12.6 V)
VBATT (V) 20 10
VCS IIN (A) 2 1 0
0 VCS (V) 4 2
VBATT
IIN (A) 2 VCS IIN 1 0
0 VCTL (V) 5 0 0
VCTL
Ta = +25 C VIN = 19 V BATT = 12 4 6 8 10 12 14 16 18 20 (ms)
2
Soft-start operating waveform constant current mode (set at 12.6 V)
VBATT (V) 20 10 0 VCS (V) 4 2 0 IIN 0 VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCTL Ta = +25 C VIN = 19 V BATT = 4 ts = 9.8 ms VBATT
Discharge operating waveform constant current mode (set at 12.6 V)
VBATT (V) 20 10 VBATT
VCS IIN (A) 2 1
0 VCS (V) 4 2 IIN 0 VCTL (V) 5 0 0 2 4 6 8 VCTL VCS
IIN (A) 2 1 0 Ta = +25 C VIN = 19 V BATT = 4 10 12 14 16 18 20 (ms)
(Continued)
26
MB3888
(Continued)
Soft-start operating waveform constant voltage mode (set at 16.8 V)
VBATT (V) 20 10 0 VCS (V) 4 2 0 IIN VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCTL
Discharge operating waveform constant voltage mode (set at 16.8 V)
VBATT (V) 20
Ta = +25 C VIN = 19 V BATT = 12 ts = 9.6 ms
VBATT VCS IIN (A) 2 1 0
10 VBATT 0 VCS (V) 4 2 0 VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCS IIN VCTL Ta = +25 C VIN = 19 V BATT = 12
IIN (A) 2 1 0
Soft-start operating waveform constant current mode (set at 16.8 V)
VBATT (V) 20 10 0 VCS (V) 4 2 0 IIN VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCTL Ta = +25 C VIN = 19 V BATT = 4 ts = 9.6 ms
Discharge operating waveform constant current mode (set at 16.8 V)
VBATT (V) 20
VBATT VCS IIN (A) 2 1 0
10 VBATT 0 VCS (V) 4 2 IIN 0 VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCTL VCS
IIN (A) 2 1 0 Ta = +25 C VIN = 19 V BATT = 4
27
MB3888
s USAGE PRECAUTIONS
* Printed circuit board ground lines should be set up with consideration for common impedance. * Take appropriate static electricity measures. * Containers for semiconductor materials should have anti-static protection or be made of conductive material. * After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. * Work platforms, tools, and instruments should be properly grounded. * Working personnel should be grounded with resistance of 250 k to 1 M between body and ground. * Do not apply negative voltages. * The use of negative voltages below -0.3 V may create parasitic transistors on LSI lines, which can cause malfunction.
s ORDERING INFORMATION
Part number MB3888PFV Package 20-pin plastic SSOP (FPT-20P-M03) Remarks
28
MB3888
s PACKAGE DIMENSION
20-pin plastic SSOP (FPT-20P-M03)
* 6.500.10(.256.004)
20 11
Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness.
0.170.03 (.007.001)
* 4.400.10
INDEX
6.400.20 (.173.004) (.252.008)
Details of "A" part 1.25 -0.10 .049 -.004 LEAD No.
1 10
+0.20 +.008
(Mounting height)
0.65(.026)
"A" 0.240.08 (.009.003) 0.13(.005)
M
0~8 0.100.10 (Stand off) (.004.004) 0.25(.010)
0.10(.004)
0.500.20 (.020.008) 0.45/0.75 (.018/.030)
C
1999 FUJITSU LIMITED F20012S-3C-5
Dimensions in mm (inches)
29
MB3888
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F0209 (c) FUJITSU LIMITED Printed in Japan


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